Index

287

W

x86 64 att_syntax pseudo op, see Section 21.2 AT&T

Syntax versus Intel Syntax

warning for altered difference tables, see Section 3.6

Difference Tables:

x86 64 conversion instructions, see Section 21.3 In 

 K

warning messages, see Section 2.7 Error and Warning

struction Naming

Messages

x86 64 floating point, see Section 21.8 Floating Point

warnings,

causing

error,

see

Section

3.16

x86 64 immediate operands, see Section 21.2 AT&T

Control

Warnings:

 W ,

 warn,

 no warn,

Syntax versus Intel Syntax

 fatal warnings

x86 64 instruction naming, see Section 21.3 Instruc 

warnings, M32R, see Section 25.3 M32R Warnings

tion Naming

warnings,

suppressing,

see

Section

3.16

x86 64 intel_syntax pseudo op, see Section 21.2

Control

Warnings:

 W ,

 warn,

 no warn,

AT&T Syntax versus Intel Syntax

 fatal warnings

warnings,

switching

on,

see

Section

3.16

x86 64 jump optimization, see Section 21.7 Handling

Control

Warnings:

of Jump Instructions

 W ,

 warn,

 no warn,

 fatal warnings

x86 64 jump, call, return, see Section 21.2 AT&T Syn 

weak directive, see Section 8.100 .weak

names

tax versus Intel Syntax

whitespace, see Section 4.2 Whitespace

x86 64 jump/call operands, see Section 21.2 AT&T

whitespace, removed by preprocessor, see Section 4.1

Syntax versus Intel Syntax

Preprocessing

x86 64 memory references, see Section 21.6 Memory

wide floating point directives, VAX, see Section 40.3

References

Vax Machine Directives

x86 64 options, see Section 21.1 Options

width directive, TIC54X, see Section 38.9 Directives

x86 64 register operands, see Section 21.2 AT&T Syn 

Width of continuation lines of disassembly output, see

tax versus Intel Syntax

Section 3.8 Configuring listing output:  listing

Width of first line disassembly output, see Section 3.8

x86 64 registers, see Section 21.4 Register Naming

Configuring listing output:  listing

x86 64 sections, see Section 21.2 AT&T Syntax versus

Width of source line output, see Section 3.8 Configur 

Intel Syntax

ing listing output:  listing

x86 64 size suffixes, see Section 21.2 AT&T Syntax

wmsg directive, TIC54X, see Section 38.9 Directives

versus Intel Syntax

word

directive,

see

Section

8.101

.word

x86 64 source, destination operands, see Section 21.2

expressions

AT&T Syntax versus Intel Syntax

word directive, ARC, see Section 12.4 ARC Machine

x86 64 support, see Chapter 21 80386 Dependent

Directives

Features

word directive, H8/300, see Section 17.4 H8/300 Ma 

chine Directives

x86 64 syntax compatibility, see Section 21.2 AT&T

Syntax versus Intel Syntax

word directive, H8/500, see Section 18.4 H8/500 Ma 

chine Directives

xfloat directive, TIC54X, see Section 38.9 Direc 

word directive, i386, see Section 21.8 Floating Point

tives

word directive, M88K, see Section 28.1 M88K Ma 

xlong directive, TIC54X, see Section 38.9 Directives

chine Directives

Xtensa architecture, see Chapter 42 Xtensa Dependent

word directive, SPARC, see Section 37.4 Sparc Ma 

Features

chine Directives

Xtensa assembler syntax, see Section 42.2 Assembler

word directive, TIC54X, see Section 38.9 Directives

Syntax

word directive, x86 64, see Section 21.8 Floating

Xtensa density option, see Section 42.1 Command

Point

Line Options

writing patterns in memory, see Section 8.38 .fill

repeat

,

size

,

value

Xtensa directives, see Section 42.5 Directives

wval, see Section 39.3 Assembler Directives for the

Xtensa opcode names, see Section 42.2.1 Opcode

Z8000

Names

Xtensa register names, see Section 42.2.2 Register

Names

X

xword directive, SPARC, see Section 37.4 Sparc Ma 

x86 64 arch directive, see Section 21.12 Specifying

chine Directives

CPU Architecture