282

Index

psize directive, see Section 8.71 .psize

lines

,

registers, x86 64, see Section 21.4 Register Naming

columns

registers, Z8000, see Section 39.2.2 Register Names

pstring directive, TIC54X, see Section 38.9 Direc 

relax directive, see Section 42.5.2 relax

tives

psw register, V850, see Section 41.2.2 Register Names

relaxation, see Section 42.4 Xtensa Relaxation

purgem directive, see Section 8.72 .purgem

name

relaxation of ADDI instructions, see Section 42.4.3

purpose of gnu assembler, see Section 2.2 The GNU

Other Immediate Field Relaxation

Assembler

relaxation of branch instructions, see Section 42.4.1

pushsection

directive,

see

Section

8.73

Conditional Branch Relaxation

.pushsection

name

,

subsection

relaxation of call instructions, see Section 42.4.2

quad directive, see Section 8.74 .quad

bignums

Function Call Relaxation

quad directive, i386, see Section 21.8 Floating Point

relaxation of immediate fields, see Section 42.4.3

quad directive, x86 64, see Section 21.8 Floating

Other Immediate Field Relaxation

Point

relaxation of L16SI instructions, see Section 42.4.3

Other Immediate Field Relaxation

R

relaxation of L16UI instructions, see Section 42.4.3

Other Immediate Field Relaxation

real mode code, i386, see Section 21.10 Writing 16 

relaxation of

bit Code

L32I instructions, see Section 42.4.3

Other Immediate Field Relaxation

ref directive, TIC54X, see Section 38.9 Directives

register directive, SPARC, see Section 37.4 Sparc

relaxation of L8UI instructions, see Section 42.4.3

Machine Directives

Other Immediate Field Relaxation

register names, Alpha, see Section 11.3.2 Register

relaxation of MOVI instructions, see Section 42.4.3

Names

Other Immediate Field Relaxation

register names, AMD 29K, see Section 10.2.3 Regis 

relocation, see Chapter 5 Sections and Relocation

ter Names

relocation example, see Section 5.2 Linker Sections

register names, ARC, see Section 12.2.2 Register

Names

relocations, Alpha, see Section 11.3.3 Relocations

register names, ARM, see Section 13.2.2 Register

repeat prefixes, i386, see Section 21.5 Instruction Pre 

Names

fixes

register names, CRIS, see Section 14.3.3 Register

reporting bugs in assembler, see Chapter 43 Reporting

names

Bugs

register names, H8/300, see Section 17.2.2 Register

rept directive, see Section 8.75 .rept

count

Names

req directive, ARM, see Section 13.4 ARM Machine

register names, MMIX, see Section 30.3.3 Register

Directives

names

register names, MSP 430, see Section 31.2.3 Register

reserve directive, SPARC, see Section 37.4 Sparc

Names

Machine Directives

register names, V850, see Section 41.2.2 Register

return instructions, i386, see Section 21.2 AT&T Syn 

Names

tax versus Intel Syntax

register names, VAX, see Section 40.6 VAX Operands

return instructions, x86 64, see Section 21.2 AT&T

register names, Xtensa, see Section 42.2.2 Register

Syntax versus Intel Syntax

Names

REX prefixes, i386, see Section 21.5 Instruction Pre 

register operands, i386, see Section 21.2 AT&T Syntax

fixes

versus Intel Syntax

register operands, x86 64, see Section 21.2 AT&T

rsect, see Section 39.3 Assembler Directives for the

Syntax versus Intel Syntax

Z8000

registers, D10V, see Section 15.2.4 Register Names

sblock directive, TIC54X, see Section 38.9 Direc 

registers, D30V, see Section 16.2.5 Register Names

tives

registers, H8/500, see Section 18.2.2 Register Names

sbttl

directive,

see

Section

8.76

.sbttl

registers, i386, see Section 21.4 Register Naming

"

subheading

"

registers, SH, see Section 35.2.2 Register Names

scl directive, see Section 8.77 .scl

class

registers, SH64, see Section 36.2.2 Register Names

sdaoff pseudo op, V850, see Section 41.5 Opcodes

registers, TIC54X memory mapped, see Section

38.11 Memory mapped Registers