Index
281
P
prefixes, i386, see Section 21.5 Instruction Prefixes
preprocessing, see Section 4.1 Preprocessing
padding the location counter, see Section 8.3 .align
preprocessing, turning on and off, see Section 4.1 Pre
abs expr
,
abs expr
,
abs expr
processing
padding the location counter given a power of
previous directive, see Section 8.67 .previous
two, see Section 8.66 .p2align[wl]
abs expr
,
primary attributes, COFF symbols, see Section 6.5.4
abs expr
,
abs expr
Symbol Attributes for COFF
padding the location counter given number of
print directive, see Section 8.69 .print
string
bytes, see Section 8.6 .balign[wl]
abs expr
,
proc directive, SPARC, see Section 37.4 Sparc Ma
abs expr
,
abs expr
chine Directives
page, in listings, see Section 8.24 .eject
profiler directive, MSP 430, see Section 31.4 MSP
paper size, for listings, see Section 8.71 .psize
430 Machine Directives
lines
,
columns
profiling capability for MSP 430, see Section 31.6
paths
for
.include,
see
Section
3.5
Profiling Capability
.includeSearch Path: Ipath
protected directive, see Section 8.70 .protected
patterns, writing in memory, see Section 8.38 .fill
names
repeat
,
size
,
value
protected registers, AMD 29K, see Section 10.2.3
PDP 11 comments, see Section 32.3 PDP 11 Assem
Register Names
bly Language Syntax
pseudo op .dword, CRIS, see Section 14.3.4 Assem
PDP 11 floating point register syntax, see Section
bler Directives
32.3 PDP 11 Assembly Language Syntax
pseudo op .syntax, CRIS, see Section 14.3.4 Assem
PDP 11 general purpose register syntax, see Section
bler Directives
32.3 PDP 11 Assembly Language Syntax
pseudo op BSPEC, MMIX, see Section 30.3.4 Assem
PDP 11 instruction naming, see Section 32.4 Instruc
bler Directives
tion Naming
pseudo op BYTE, MMIX, see Section 30.3.4 Assem
PDP 11 support, see Chapter 32 PDP 11 Dependent
bler Directives
Features
pseudo op ESPEC, MMIX, see Section 30.3.4 Assem
PDP 11 syntax, see Section 32.3 PDP 11 Assembly
bler Directives
Language Syntax
pseudo op GREG, MMIX, see Section 30.3.4 Assem
PIC code generation for ARM, see Section 13.1 Op
bler Directives
tions
pseudo op IS, MMIX, see Section 30.3.4 Assembler
PIC code generation for M32R, see Section 25.1
Directives
M32R Options
pseudo op LOC, MMIX, see Section 30.3.4 Assem
PJ endianness, see Chapter 2 Overview
bler Directives
PJ options, see Section 33.1 Options
pseudo op LOCAL, MMIX, see Section 30.3.4 As
PJ support, see Chapter 33 picoJava Dependent Fea
sembler Directives
tures
pseudo op OCTA, MMIX, see Section 30.3.4 Assem
plus, permitted arguments, see Section 7.2.4 Infix Op
bler Directives
erators
pseudo op PREFIX, MMIX, see Section 30.3.4 As
popsection
directive,
see
Section
8.68
sembler Directives
.popsection
pseudo op TETRA, MMIX, see Section 30.3.4 As
Position independent code, CRIS, see Section 14.1
sembler Directives
Command line Options
pseudo op WYDE, MMIX, see Section 30.3.4 Assem
Position independent code, symbols in, CRIS, see
bler Directives
Section 14.3.2 Symbols in position independent code
pseudo opcodes, M680x0, see Section 26.6.1 Branch
PowerPC architectures, see Section 34.1 Options
Improvement
PowerPC directives, see Section 34.2 PowerPC As
pseudo opcodes, M68HC11, see Section 27.6.1
sembler Directives
Branch Improvement
PowerPC options, see Section 34.1 Options
pseudo ops for branch, VAX, see Section 40.5 VAX
PowerPC support, see Chapter 34 PowerPC Depen
Branch Improvement
dent Features
pseudo ops, CRIS, see Section 14.3.4 Assembler Di
precedence of directives, see Section 42.5 Directives
rectives
precedence of operators, see Section 7.2.4 Infix Oper
pseudo ops, machine independent, see Chapter 8 As
ators
sembler Directives
precision, floating point, see Section 4.6.2.3 Flonums
pseudo ops, MMIX, see Section 30.3.4 Assembler Di
prefix operators, see Section 7.2.3 Prefix Operator
rectives
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