278

Index

machine directives, ARM, see Section 13.4 ARM Ma 

MIPS architecture options, see Section 29.1 Assem 

chine Directives

bler options

machine directives, H8/300 (none), see Section 17.4

MIPS big endian output, see Section 29.1 Assembler

H8/300 Machine Directives

options

machine directives, H8/500 (none), see Section 18.4

MIPS debugging directives, see Section 29.3 Direc 

H8/500 Machine Directives

tives for debugging information

machine directives, i860, see Section 22.3 i860 Ma 

MIPS ECOFF sections, see Section 29.2 MIPS

chine Directives

ECOFF object code

machine directives, i960, see Section 23.3 i960 Ma 

MIPS endianness, see Chapter 2 Overview

chine Directives

MIPS ISA, see Chapter 2 Overview

machine directives, MSP 430, see Section 31.4 MSP

MIPS ISA override, see Section 29.4 Directives to

430 Machine Directives

override the ISA level

machine directives, SH, see Section 35.4 SH Machine

MIPS little endian output, see Section 29.1 Assembler

Directives

options

machine directives, SH64, see Section 36.3 SH64 Ma 

MIPS MDMX instruction generation override, see

chine Directives

Section 29.8 Directives to control generation of MIPS

machine directives, SPARC, see Section 37.4 Sparc

ASE instructions

Machine Directives

MIPS MIPS 3D instruction generation override, see

machine directives, TIC54X, see Section 38.9 Direc 

Section 29.8 Directives to control generation of MIPS

tives

ASE instructions

machine directives, V850, see Section 41.4 V850 Ma 

MIPS option stack, see Section 29.7 Directives to save

chine Directives

and restore options

machine directives, VAX, see Section 40.3 Vax Ma 

MIPS processor, see Chapter 29 MIPS Dependent

chine Directives

Features

machine independent directives, see Chapter 8 Assem 

mit, see Section 26.2 Syntax

bler Directives

mlib directive, TIC54X, see Section 38.9 Directives

machine instructions (not covered), see Section 2.1

mlist directive, TIC54X, see Section 38.9 Directives

Structure of this Manual

MMIX assembler directive BSPEC, see Section

machine independent syntax, see Chapter 4 Syntax

30.3.4 Assembler Directives

macro directive, see Section 8.60 .macro

MMIX assembler directive BYTE, see Section 30.3.4

macro directive, TIC54X, see Section 38.9 Directives

Assembler Directives

macros, see Section 8.60 .macro

MMIX assembler directive ESPEC, see Section

Macros, AMD 29K, see Section 10.2.1 Macros

30.3.4 Assembler Directives

macros, count executed, see Section 8.60 .macro

MMIX assembler directive GREG, see Section 30.3.4

Macros, MSP 430, see Section 31.2.1 Macros

Assembler Directives

macros, TIC54X, see Section 38.10 Macros

MMIX assembler directive IS, see Section 30.3.4 As 

make rules, see Section 3.10 Dependency Tracking:

sembler Directives

 MD

MMIX assembler directive LOC, see Section 30.3.4

manual, structure and purpose, see Section 2.1 Struc 

Assembler Directives

ture of this Manual

MMIX assembler directive LOCAL, see Section

math builtins, TIC54X, see Section 38.7 Math Builtins

30.3.4 Assembler Directives

Maximum number of continuation lines, see Section

MMIX assembler directive OCTA, see Section 30.3.4

3.8 Configuring listing output:  listing

Assembler Directives

memory references, i386, see Section 21.6 Memory

MMIX assembler directive PREFIX, see Section

References

30.3.4 Assembler Directives

memory references, x86 64, see Section 21.6 Memory

MMIX assembler directive TETRA, see Section

References

30.3.4 Assembler Directives

memory mapped registers, TIC54X, see Section

MMIX assembler directive WYDE, see Section

38.11 Memory mapped Registers

30.3.4 Assembler Directives

merging text and data sections, see Section 3.12 Join

MMIX assembler directives, see Section 30.3.4 As 

Data and Text Sections:  R

sembler Directives

messages from assembler, see Section 2.7 Error and

MMIX line comment characters, see Section 30.3.1

Warning Messages

Special Characters

minus, permitted arguments, see Section 7.2.4 Infix

MMIX options, see Section 30.1 Command line Op 

Operators

tions