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Chapter 42. Xtensa Dependent Features

42.2. Assembler Syntax

Block comments are delimited by

/*

and

*/

. End of line comments may be introduced with either

#

or

//

.

Instructions consist of a leading opcode or macro name followed by whitespace and an optional

comma separated list of operands:

opcode [operand,...]

Instructions must be separated by a newline or semicolon.

42.2.1. Opcode Names

See the [Xtensa Instruction Set Architecture (ISA) Reference Manual] for a complete list of opcodes

and descriptions of their semantics.

The Xtensa assembler distinguishes between generic and specific opcodes. Specific opcodes corre 

spond directly to Xtensa machine instructions. Prefixing an opcode with an underscore character (

_

)

identifies it as a specific opcode. Opcodes without a leading underscore are generic, which means the

assembler is required to preserve their semantics but may not translate them directly to the specific

opcodes with the same names. Instead, the assembler may optimize a generic opcode and select a

better instruction to use in its place (Section 42.3 Xtensa Optimizations), or the assembler may relax

the instruction to handle operands that are out of range for the corresponding specific opcode (Section

42.4 Xtensa Relaxation).

Only use specific opcodes when it is essential to select the exact machine instructions produced by

the assembler. Using specific opcodes unnecessarily only makes the code less efficient, by disabling

assembler optimization, and less flexible, by disabling relaxation.

Note that this special handling of underscore prefixes only applies to Xtensa opcodes, not to either

built in macros or user defined macros. When an underscore prefix is used with a macro (e.g.,

_NOP

),

it refers to a different macro. The assembler generally provides built in macros both with and without

the underscore prefix, where the underscore versions behave as if the underscore carries through to

the instructions in the macros. For example,

_NOP

expands to

_OR a1,a1,a1

.

The underscore prefix only applies to individual instructions, not to series of instructions. For example,

if a series of instructions have underscore prefixes, the assembler will not transform the individual

instructions, but it may insert other instructions between them (e.g., to align a

LOOP

instruction).

To prevent the assembler from modifying a series of instructions as a whole, use the

no generics

directive. Section 42.5.4 generics.

42.2.2. Register Names

An initial

$

character is optional in all register names. General purpose registers are named

a0

. . .

a15

.

Additional registers may be added by processor configuration options. In particular, the mac16 option

adds a mr register bank. Its registers are named

m0

. . .

m3

.

As a special feature,

sp

is also supported as a synonym for

a1

.

42.3. Xtensa Optimizations

The optimizations currently supported by

as

are generation of density instructions where appropriate

and automatic branch target alignment.