Chapter 35. Renesas / SuperH SH Dependent Features

199

@(R0, GBR)

GBR indexed

addr

@(disp, PC)

PC relative address (for branch or for addressing memory). The

as

implementation allows you

to use the simpler form

addr

anywhere a PC relative address is called for; the alternate form is

supported for compatibility with other assemblers.

#imm

Immediate data

35.3. Floating Point

SH2E, SH3E and SH4 groups have on chip floating point unit (FPU). Other SH groups can use

.float

directive to generate ieee floating point numbers.

SH2E and SH3E support single precision floating point calculations as well as entirely PCAPI com 

patible emulation of double precision floating point calculations. SH2E and SH3E instructions are a

subset of the floating point calculations conforming to the IEEE754 standard.

In addition to single precision and double precision floating point operation capability, the on chip

FPU of SH4 has a 128 bit graphic engine that enables 32 bit floating point data to be processed

128 bits at a time. It also supports 4 * 4 array operations and inner product operations. Also, a su 

perscalar architecture is employed that enables simultaneous execution of two instructions (including

FPU instructions), providing performance of up to twice that of conventional architectures at the same

frequency.

35.4. SH Machine Directives

uaword

ualong

as

will issue a warning when a misaligned

.word

or

.long

directive is used. You may use

.uaword

or

.ualong

to indicate that the value is intentionally misaligned.

35.5. Opcodes

For detailed information on the SH machine instruction set, see [SH Microcomputer User's Manual]

(Renesas) or [SH 4 32 bit CPU Core Architecture] (SuperH) and [SuperH (SH) 64 Bit RISC Series]

(SuperH).

as

implements all the standard SH opcodes. No additional pseudo instructions are needed on this

family. Note, however, that because

as

supports a simpler form of PC relative addressing, you may

simply write (for example)

mov.l

bar,r0

where other assemblers might require an explicit displacement to

bar

from the program counter: