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Chapter 31. MSP 430 Dependent Features

Register names

PC

,

SP

and

SR

cannot be used as register names and will be treated as variables. Use

r0

,

r1

, and

r2

instead.

31.2.4. Assembler Extensions

@rN

As destination operand being treated as

0(rn)

0(rN)

As source operand being treated as

@rn

jCOND +N

Skips next N bytes followed by jump instruction and equivalent to

jCOND $+N+2

Also, there are some instructions, which cannot be found in other assemblers. These are branch in 

structions, which has different opcodes upon jump distance. They all got PC relative addressing mode.

beq label

A polymorph instruction which is

jeq label

in case if jump distance within allowed range for

cpu's jump instruction. If not, this unrolls into a sequence of

jne $+6

br

label

bne label

A polymorph instruction which is

jne label

or

jeq +4; br label

blt label

A polymorph instruction which is

jl label

or

jge +4; br label

bltn label

A polymorph instruction which is

jn label

or

jn +2; jmp +4; br label

bltu label

A polymorph instruction which is

jlo label

or

jhs +2; br label

bge label

A polymorph instruction which is

jge label

or

jl +4; br label

bgeu label

A polymorph instruction which is

jhs label

or

jlo +4; br label

bgt label

A polymorph instruction which is

jeq +2; jge label

or

jeq +6; jl +4; br label

bgtu label

A polymorph instruction which is

jeq +2; jhs label

or

jeq +6; jlo +4; br label