Chapter 29.
MIPS Dependent Features
gnu
as
for mips architectures supports several different mips processors, and MIPS ISA levels I
through V, MIPS32, and MIPS64. For information about the mips instruction set, see [MIPS RISC
Architecture], by Kane and Heindrich (Prentice Hall). For an overview of mips assembly conventions,
see "Appendix D: Assembly Language Programming" in the same work.
29.1. Assembler options
The mips configurations of gnu
as
support these special options:
G num
This option sets the largest size of an object that can be referenced implicitly with the
gp
register.
It is only accepted for targets that use ecoff format. The default value is 8.
EB
EL
Any mips configuration of
as
can select big endian or little endian output at run time (unlike the
other gnu development tools, which must be configured for one or the other). Use
EB
to select
big endian output, and
EL
for little endian.
mips1
mips2
mips3
mips4
mips5
mips32
mips32r2
mips64
mips64r2
Generate code for a particular MIPS Instruction Set Architecture level.
mips1
corresponds to
the r2000 and r3000 processors,
mips2
to the r6000 processor,
mips3
to the r4000 processor,
and
mips4
to the r8000 and r10000 processors.
mips5
,
mips32
,
mips32r2
,
mips64
, and
mips64r2
correspond to generic MIPS V, MIPS32, MIPS32 Release 2, MIPS64, and MIPS64
Release 2 ISA processors, respectively. You can also switch instruction sets during the assembly;
see Directives to override the ISA level.
mgp32
mfp32
Some macros have different expansions for 32 bit and 64 bit registers. The register sizes are
normally inferred from the ISA and ABI, but these flags force a certain group of registers to be
treated as 32 bits wide at all times.
mgp32
controls the size of general purpose registers and
mfp32
controls the size of floating point registers.
On some MIPS variants there is a 32 bit mode flag; when this flag is set, 64 bit instructions
generate a trap. Also, some 32 bit OSes only save the 32 bit registers on a context switch, so it
is essential never to use the 64 bit registers.
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