Chapter 22.

Intel i860 Dependent Features

22.1. i860 Notes

This is a fairly complete i860 assembler which is compatible with the UNIX System V/860 Release 4

assembler. However, it does not currently support SVR4 PIC (i.e.,

@GOT, @GOTOFF, @PLT

).

Like the SVR4/860 assembler, the output object format is ELF32. Currently, this is the only supported

object format. If there is sufficient interest, other formats such as COFF may be implemented.

Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter being the default. One differ 

ence is that AT&T syntax requires the '%' prefix on register names while Intel syntax does not. An 

other difference is in the specification of relocatable expressions. The Intel syntax is

ha%expression

whereas the SVR4 syntax is

[expression]@ha

(and similarly for the "l" and "h" selectors).

22.2. i860 Command line Options

22.2.1. SVR4 compatibility options

 V

Print assembler version.

 Qy

Ignored.

 Qn

Ignored.

22.2.2. Other options

 EL

Select little endian output (this is the default).

 EB

Select big endian output. Note that the i860 always reads instructions as little endian data, so this

option only effects data and not instructions.

 mwarn expand

Emit a warning message if any pseudo instruction expansions occurred. For example, a

or

in 

struction with an immediate larger than 16 bits will be expanded into two instructions. This is

a very undesirable feature to rely on, so this flag can help detect any code where it happens.

One use of it, for instance, has been to find and eliminate any place where

gcc

may emit these

pseudo instructions.