Chapter 15.

D10V Dependent Features

15.1. D10V Options

The Mitsubishi D10V version of

as

has a few machine dependent options.

 O

The D10V can often execute two sub instructions in parallel. When this option is used,

as

will

attempt to optimize its output by detecting when instructions can be executed in parallel.

 nowarnswap

To optimize execution performance,

as

will sometimes swap the order of instructions. Normally

this generates a warning. When this option is used, no warning will be generated when instruc 

tions are swapped.

 gstabs packing

 no gstabs packing

as

packs adjacent short instructions into a single packed instruction.

 no gstabs packing

turns instruction packing off if

 gstabs

is specified as well;

 gstabs packing

(the default)

turns instruction packing on even when

 gstabs

is specified.

15.2. Syntax

The D10V syntax is based on the syntax in Mitsubishi's D10V architecture manual. The differences

are detailed below.

15.2.1. Size Modifiers

The D10V version of

as

uses the instruction names in the D10V Architecture Manual. However, the

names in the manual are sometimes ambiguous. There are instruction names that can assemble to

a short or long form opcode. How does the assembler pick the correct form?

as

will always pick

the smallest form if it can. When dealing with a symbol that is not defined yet when a line is being

assembled, it will always use the long form. If you need to force the assembler to use either the short

or long form of the instruction, you can append either

.s

(short) or

.l

(long) to it. For example, if you

are writing an assembly program and you want to do a branch to a symbol that is defined later in your

program, you can write

bra.s foo

. Objdump and GDB will always append

.s

or

.l

to instructions

which have both short and long forms.

15.2.2. Sub Instructions

The D10V assembler takes as input a series of instructions, either one per line, or in the special two 

per line format described in the next section. Some of these instructions will be short form or sub 

instructions. These sub instructions can be packed into a single instruction. The assembler will do this

automatically. It will also detect when it should not pack instructions. For example, when a label is

defined, the next instruction will never be packaged with the previous one. Whenever a branch and

link instruction is called, it will not be packaged with the next instruction so the return address will be

valid. Nops are automatically inserted when necessary.